T R A I N I N G  A G E N D A

1 Day Comprehensive System Verilog Assertions Training (.pdf)

2 Day Comprehensive System Verilog Assertions and Functional Coverage Training (.pdf)

Both classes include a Reference Grade Training Book and LABs

email :: info@defineview.com

phone :: 408-309-1556

For on-site enrollment of 6 or more students,

10% discount will be given to all students of the same company.

INTENDED AUDIENCE

Design/Verification engineers and managers

Verification IP developers

EDA Application engineers

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